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PCMCIA Flash Memory Card
FLF10 Series High Density FLASH Memory Card General Description
WEDC's Flash memory cards - FLF10 Series - offer high density linear Flash memory for code and data storage, high performance disk emulation, mobile PC and embedded applications. The WEDC FLF10 series is based on Intel's Multi Level Cell (MLC) Flash memory technology, providing high density Flash components at a significantly lower cost per megabyte. MLC technology allows for two bits of information to be stored in a single cell. This leads to reduced die size and reduced cost per megabyte. WEDC's FLF10 series cards are built with Intel's 128Mb memory component, 28F128J3A, with a manufacturer/device ID of 89/18H. The FLF10 series is available in densities of 32, 64, 96, 128, 160, and 192MB. WEDC's FLF10 series provides densities from 32MB to 192MB, in 32MB increments. The cards up to the 64MB density operate in the regular PCMCIA mode. The densities beyond the 64MB density are implemented using a "paging scheme", which is also supported by the PCMCIA standard. By writing a page address to the Configuration Option Register (address 4000H), an additional page of memory can be accessed. The current FLF10 series supports densities to 192MB: total of 3 pages: page 0 := 64MB, page 1 := 64MB, and page 2 := 64MB. The FLF10 series card operates in a wide, universal voltage range, from 3V to 5V, allowing full "plug and play" functionality and upgrade solutions in all mobile, battery powered applications. Each memory component in the card also has a 128-bit Protection Register, containing 64 bits of User Programmable OTP (One Time Programmable) Cells. These cells can be programmed with a numeric security measure, such as an electronic signature. To provide a 16 bit word wide access supported by the PCMCIA standard, devices are paired on the card. Therefore, the Flash array is structured in 128K word (256kB) blocks. Write, read and block erase operations can be performed as either a word or byte wide operation. The FLF10 series cards conform to the PC Card 95 Standard supported by PCMCIA and JEIDA, providing electrical and physical compatibility. The PC Card form factor offers an industry standard pinout and mechanical outline, allowing density upgrades without system design changes. WEDC's standard cards are shipped with WEDC's Flash Logo. Cards are also available with blank housings (no Logo). The blank housings are available in both, a recessed (for label) or flat housing. Please contact your WEDC sales representative for further information on Custom artwork.
November 2000 Rev. 3 - ECO #13392 1 PC Card Products
32, 64, 96, 128, 160, 192 MEGABYTE Features
* Low cost, high density Linear Flash Card * Universal 3V to 5V operating range providing full "plug and play" exchangeability between different systems * Based on Intel 28F128J3A (MLC) Components * Fast Read Performance - 250ns Maximum Access Time - (200ns optional) *PCMCIA compatible - x8/ x16 Data Interface * 32-Byte Write Buffer (per Memory Device) - 6s per Byte Effective Write Time *128-bit Protection Register (per Memory Device) -64-bit Unique Device Identifier -64-bit User Programmable OTP Cells *Cross-Compatible Command Support - Common Flash Interface (CFI) - Intel Basic Command Set - Scaleable Command Set * Power-Down Mode - Reset, Power Down Registers * 100,000 Erase Cycles per Block * 128K word symmetrical Block Architecture * PC Card Standard Type I Form Factor
PCMCIA Flash Memory Card
FLF10 Series Block Diagram
N x 28F128J3A
Device Pair (N/2 - 1) CLn CH0 Device (N-1) Device (N-2) (B26) A1-A23 + ADDRESS BUS (A1-A25) (A1-A25) A24, A25, B26 B26, (B27..) D5-D0=Page Number (PN) SRes LvReq D6 D5 - Page Number (PN) D4 D3 D2
A1-A25
ADDRESS BUFFER
D7
M Res /WRi /RDi CHn Qn Device Pair 1 CH0 Device 3 Device 2 CL1 CH0 CLn CL0 Q2 Q0 Ctrl Ai /WE /OE
D1
D0
Configuration Option Register: A=4000h (Read/Write)
control logic
/CE2 /CE1 /REG SR Clr Reg Clr ADDRESS 4008h 4006h 4004h 4002h 4000h Register NAME
At/Reg enable
Device Pair 0 CL0 CH0 Device 1 Device 0 4000h
Management Registers
Config. and Status Reg. Configuration Option Register
DATA BUS Q8-Q15
DATA BUS Q0-Q7
0000h
attrib. mem CIS EPROM 2kB
control
Q0-Q7
I/O buffer
DATA BUS D8-D15 DATA BUS D0-D7
A0
Reset
220k
reset circuit
C
M Res SR Clr Reg Clr
R Vcc
D0 - D15
CD1 CD2 (3V-5V) Vcc GND WAIT R/BUSY VS1 VS2 BVD1 BVD2 Vpp2 Vpp1 N.C. N.C. R/B1 R/B0 OPEN OPEN 10k Vcc OPEN R/B(N-1) Vcc
Configuration Option Register: ADRS=4000h Read/Write SRes D7 D7 LvReq D6 D5 - Page Number (PN) D4 D3 D2 D1 D0
Soft Reset, active High 1=Reset State 0=End Reset State LevelReq (not supported) Configuration index D5-D2 reserved D0:D1 Page Number Config. (PN)
D6 D5-D0
Power On default =0
Configuration Status Register: ADRS=4002h Read/Write D7 D2 reserved PwrDwn reserved D6 D5 D4 D3 D2 D1 D0 Power Down; active High 1 = Place all memory devices in power down mode 0 = normal operation Power On default=0
/CE1, /CE2,/OE, /WE, /Reg: A0: Reset: R/Busy - Open Drain output
pull up
typ 100k
pull down typ 100k pull down typ 220k pull up typ 100k
Manufacturer ID Device ID
Intel
89H 18H
28F128J3A
FLF10 Flash Card based on Strata Flash 28F128J3A
November 2000 Rev. 3 - ECO #13392 2 PC Card Products
PCMCIA Flash Memory Card
FLF10 Series Pinout
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Signal name GND DQ3 DQ4 DQ5 DQ6 DQ7 CE1# A10 OE# A11 A9 A8 A13 A14 WE# RDY/BSY# Vcc Vpp1 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 WP GND I/O I/O I/O I/O I/O I/O I I I I I I I I I O Function Ground Data bit 3 Data bit 4 Data bit 5 Data bit 6 Data bit 7 Card enable 1 Address bit 10 Output enable Address bit 11 Address bit 9 Address bit 8 Address bit 13 Address bit 14 Write Enable Ready/Busy Supply Voltage Prog. Voltage Address bit 16 Address bit 15 Address bit 12 Address bit 7 Address bit 6 Address bit 5 Address bit 4 Address bit 3 Address bit 2 Address bit 1 Address bit 0 Data bit 0 Data bit 1 Data bit 2 Write Potect Ground Active Pin 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 Signal name I/O GND CD1# O DQ11 I/O DQ12 I/O DQ13 I/O DQ14 I/O DQ15 I CE2# I VS1 O RFU RFU A17 I A18 I A19 I A20 I A21 I Vcc Vpp2 A22 I A23 I A24 I A25 I VS2 O RST I Wait# O RFU REG# I BVD2 O BVD1 O DQ8 I/O DQ9 I/O DQ10 O CD2# O GND Function Ground Card Detect 1 Data bit 11 Data bit 12 Data bit 13 Data bit 14 Data bit 15 Card Enable 2 Voltage Sense 1 Reserved Reserved Address bit 17 Address bit 18 Address bit 19 Address bit 20 Address bit 21 Supply Voltage Prog. Voltage Address bit 22 Address bit 23 Address bit 24 Address bit 25 Voltage Sense 2 Card Reset Extended Bus cycle Reserved Attrib Mem Select Bat. Volt. Detect 2 Bat. Volt. Detect 1 Data bit 8 Data bit 9 Data bit 10 Card Detect 2 Ground Active LOW
LOW LOW
LOW NC (2)
LOW LOW(1) N.C.
N.C.
I I I I I I I I I I I I/O I/O I/O O
N.C. HIGH LOW(3)
(3) (3)
HIGH
LOW
Notes: 1. RDY/BSY signal is an open drain type output, pull-up resistors are required on the host side. 2. VS1 is connected to GND. 3. Wait#, BVD1 and BVD2 are internally connected to Vcc by resistors for compatibility.
Mechanical
Interconnect area 1.6mm 0.05 (0.063") 10.0mm MIN (0.400") 3.0mm MIN 1.0mm 0.05 (0.039")
Substrate area
54.0mm 0.10 (2.126")
1.0mm 0.05 (0.039") 10.0mm MIN (0.400")
85.6mm 0.20 (3.370")
3.3mm T1 (0.130") T1=0.10mm interconnect area T1=0.20mm substrate area
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series Card Signal Description
Symbol A0 - A25 DQ0 - DQ15 CE1#, CE2# OE# WE# RDY/BSY # Type INPUT INPUT/OUTPUT INPUT INPUT INPUT OUTPUT Name and Function ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not used in word access mode. A25 is the most significant bit DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ15 is the MSB. CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows 8bit hosts to access all data on DQ0 - DQ7 (see truth table). OUTPUT ENABLE: Active low signal gating read data from the memory card. WRITE ENABLE: Active low signal gating write data to the memory card. READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. A high output indicates that the card is ready to accept accesses. A low output indicates that one or more devices in the memory card are busy with internally timed erase or write activities. CARD DETECT 1 and 2: Provide card insertion detection. These signals are internally connected to ground on the card. The host shall monitor these signals to detect card insertion. Pulled up on host side. WRITE PROTECT: Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write protected, providing internal hardware write lockout to the Flash array. If card does not include optional write protect switch, this signal will be pulled low internally indicating write protect = "off". PROGRAMMING VOLTAGES: Not connected CARD POW ER SUPPLY: Universal 3V to 5V Supply CARD GROUND ATTRIBUTE MEMORY SELECT: Active low signal, enables access to attribute memory space, occupied by the Card Information Structure (CIS) and Card Registers. RESET: Active high signal for placing card in Power-on default state. Reset can be used as a Power-Down control for the memory array. WAIT: This signal is pulled high internally for compatibility. No wait states are generated. BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility. VOLTAGE SENSE: Notifies the host socket of the card's VCC requirements. VS1 grounded and VS2 is open to indicate a 3/5V card. RESERVED FOR FUTURE USE NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating.
CD1#, CD2# WP
OUTPUT OUTPUT
VPP1, VPP2 VCC GND REG # RST WAIT # BVD1, BVD2 VS1, VS2 RFU N.C.
N.C. INPUT INPUT OUTPUT OUTPUT OUTPUT
Functional Truth Table
READ function Common Memory Attribute Memory
Function Mode Standby Mode Byte Access (8 bits) Word Access (16 bits) Odd-Byte Only Access
WRITE function
/CE2 /CE1 H H H L H L L L L H H H H L L H L L L H
A0 X L H X X X L H X X
/OE X L L L L X H H H H
/WE X H H H H X L L L L
4
/REG D15-D8 D7-D0 X High-Z High-Z H High-Z Even-Byte H High-Z Odd-Byte H Odd-Byte Even-Byte H Odd-Byte High-Z X H H H H X X X Even-Byte X Odd-Byte Odd-Byte Even-Byte Odd-Byte X
/REG D15-D8 D7-D0 X High-Z High-Z L High-Z Even-Byte L High-Z Not Valid L Not Valid Even-Byte L Not Valid High-Z X L L L L X X X X X X Even-Byte X Even-Byte X
Standby Mode Byte Access (8 bits) Word Access (16 bits) Odd-Byte Only Access
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series Card Interface
The FLF10 series flash card complies with PC Card standard (PCMCIA, March 1997). While maintaining PCMCIA compatibility, the FLF10 series card has integrated special features to extend functionality. The card has built-in 2 control registers: - Configuration Option Register (COR) - Configuration and Status Register (CSR) Address = 4000h Address = 4002h
COR register: provides a soft reset function (bit D7) and additional page bits (bits D0 and D1) to extend card capacity beyond 64MB. SReset As defined by PCMCIA, setting the SReset bit to 1, places the card in the reset state. During this state all memory devices are placed in power down mode, minimizing power consumption. Returning this bit to 0 leaves the reset cycle and places the card in the same condition as following a power up or hardware reset. This bit must be cleared to 0, to access any device on the card. Complete soft reset cycle must consist of a 2 step write sequence to the SReset bit: 1. Initialization: write 1 to SReset - reset cycle begin - memory devices enters Power-Down mode aborting all operations and clearing all registers. 2. Write 0 to SReset - Reset cycle ends - memory devices and registers enter power on default state The card can also be placed in Power Down mode by activating the Reset signal (pin58) or by controlling the bit D2 (PwrDwn) in the CSR register. LevlRequest Not supported Configuration Index Configuration Index bits (D0 - D5) are defined to provide address extension bits -page address, to extend card capacity beyond 64MB. Only bits D0 and D1 are supported: - D1D0 set to 00bin (0H) selects - D1D0 set to 01bin (1H) selects: page 0 page 1
- D1D0 set to10bin (2H) selects: page 2 - D1D0 set to11bin (3H) selects: page 3 (No Memory Access) D1D0 is set to the value of 00bin (0H) during any reset cycle (Power on Reset, Hardware Reset, and SReset). Attempting to access page 3 will not result in the writing or reading of data. CSR register: provides a power control of the memory array. Only bit D2 is supported; all other bits are "don't care" PwrDwn Writing 1 to PwrDwn bit (D2) forces each memory device on the card into a reset/power down mode by asserting all the devices RP# pins. Writing 0 to the bit returns the array to stand by mode.
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series
The Card Information Structure (CIS) contains information about Register addressing and Memory structure. Cards with memory capacity up to 64MB do not support Configuration Index bits.
Notes: 1. Reading from undefined address location or unsupported bits will return random data. 2. Writing to undefined address location may result in card malfunctioning due to limited address decoding. 3. See block diagram for more details about control registers.
Writing commands to the CUI enables reading of device data, query, identifier codes, inspection and clearing of the status register, and, when VPEN = VPENH, block erasure, program, and lock-bit configuration. The Block Erase command requires appropriate command data and an address within the block to be erased. The Byte/Word Program command requires the command and address of the location to be written. Set Block Lock-Bit commands require the command and block within the device to be locked. The Clear Block Lock-Bits command requires the command and address within the device. The CUI does not occupy an addressable memory location. It is written when the device is enabled and WE# is active. The address and data needed to execute a command are latched on the rising edge of WE# or the first edge of CE0, CE1, or CE2 that disables the device. Standard microprocessor write timings are used.
For information regarding modes of operation, commands, and programming details for the memory components, please consult the Intel 28F128J3A data sheet.
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series Absolute Maximum Ratings (2)
Operating Temperature TA (ambient) Commercial Storage Temperature Voltage on any pin relative to VSS VCC supply Voltage relative to VSS 0C to +60 C -10C to +70 C -0.5V to VCC+0.5V -0.5V to +7.0V
Note: Stress greater than those listed under "Absolute Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Supply Voltage
VCC 3.3V 5.0V Tolerance 0.3V 0.5V
Note: The FLF10 Series Card will function at either 3.3V or 5.0V
DC Characteristics (1)
Symbol ICCR ICCW ICCE ICCD Parameter VCC Read Current VCC Program Current VCC Erase Current VCC Power-down Current Density (Mbytes) 32,64,96,128, 160,192 32,64,96,128, 160, 192 32,64,96,128, 160,192 32 64 96 128 160 192 32 64 96 128 160 192 Notes Typ(3) 70 70 70 2 100 200 300 400 500 600 0.1 0.2 0.3 0.4 0.5 0.6 Max 110 120 140 Units mA mA mA Test Conditions VCC = VCCmax tcycle = 200ns 2 memory devices 2 memory devices VCC = VCCmax Control Signals = VCC Reset = VCC (active)
ICCS (CMOS)
VCC Standby Current
2
200 A 400 600 800 1000 1200 0.2 mA 0.4 0.6 0.8 1.0 1.2
VCC = VCCmax Control Signals = VCC
Reset = 0V (not active)
CMOS Test Conditions: VCC = 5V 5%, VIL = VSS 0.2V, VIH = VCC 0.2V
Notes: 1. All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Word wide operations (2 memory devices activated). 2. Control Signals: CE1#, CE2#, OE#, WE#. 3. Typical: VCC = 5V or VCC = 3V, T = +25C.
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series
VCC = 3.3V or 5V
Symbol ILI ILO VIL VIH VOL VOH VLKO
Parameter Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage VCC Erase/Program Lock Voltage
Notes 1, 2 1 1 1 1 1 1
Min
Max 20 20
Units A A V V V V V
Test Conditions VCC = VCCMAX Vin =VCC or GND VCC = VCCMAX Vin =VCC or GND
0
0.8 0.4
0.7xVCC VCC+0.5 VCC-0.4 2.0 VCC
IOL = 3.2mA IOH = -2.0mA
Notes: 1. Values are the same for byte and word wide modes for all card densities. 2. Exception: Leakage current on control signals with internal pull up resistors (see block diag) will be < 500A when VIN=GND.
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series AC Characteristics
Read Timing Parameters VCC = 3.3V or 5V
200ns SYMBOL (PCMCIA) tC(R) ta(A) ta(CE) ta(OE) tsu(A) tsu(CE) th(A) th(CE) tv(A) tdis(CE) tdis(OE) ten(CE) ten(OE) trec(RST) Parameter Read Cycle Time Address Access Time Card Enable Access Time Output Enable Access Time Address Setup Time Card Enable Setup Time Address Hold Time Card Enable Hold Time Output Hold from Address Change Output Disable Time from CE# Output Disable Time from OE# Output Enable Time from CE# Output Enable Time from OE# Power Down recovery to Output Delay. VCC = 5V 5 5 500 Min 200 200 200 90 20 0 20 20 0 90 90 Max
250ns Min 250 250 250 100 30 0 20 20 0 100 100 5 5 500 Max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Read Timing Diagram
tc(R ) ta(A ) th(A )
A [25 ::0], /R E G tv(A )
ta(C E ) /C E 1, /C E 2
NOTE 1
tsu(C E )
NOTE 1
tsu (A )
ta(O E )
th(C E )
/O E ten(O E ) D [15::0] D A TA V A LID tdis(O E )
tdis(C E )
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series
Write Timing Parameters VCC = 3.3V or 5V
200ns SYMBOL (PCMCIA) tCW tw(WE) tsu(A) tsu(A-WEH) tsu(CE-WEH) tsu(D-WEH) th(D) trec(WE) tdis(WE) tdis(OE) ten(WE) ten(OE) tsu(OE-WE) th(OE-WE) tsu(CE) th(CE) trec(WEL) Parameter Write Cycle Time Write Pulse Width Address Setup Time Address Setup Time for WE# Card Enable Setup Time for WE# Data Setup Time for WE# Data Hold Time Write Recover Time/Address hold Output Disable Time from WE# Output Disable Time from OE# Output Enable Time from WE# Output Enable Time from OE# Output Enable Setup from WE# Output Enable Hold from WE# Card Enable Setup Time from OE# Card Enable Hold Time Reset recovery to WE going low 5 5 10 50 0 20 1 Min 200 120 20 140 140 60 30 30 90 90 Max
250ns Min 250 150 30 180 180 80 30 30 100 100 5 5 10 50 0 20 1 Max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Write Timing Diagram
tc(W)
A[25::0], /REG
tsu(A-WEH) tsu(CE-WEH) /CE1, /CE2
NOTE 1
trec(WE) th(CE)
tsu(CE)
NOTE 1
/OE tsu(A) /WE tsu(OE-WE) D[15::0](Din) th(D) tsu(D-WEH) tw(WE) th(OE-WE)
NOTE 2
DATA INPUT tdis(WE) tdis(OE) ten(WE) D[15::0]( Dout)
NOTE 2
ten(OE)
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series Data Write and Erase Performance (1,3)
VCC = 5V 5%, TA = 0C to + 70C
SYM tWHQV1 tWHQV3
Parameter Word/Byte Program time Byte Program Time (using Byte program command) Block Program Time (using write to buffer command) Block Erase Time Erase Suspend Latency Time to Read
Notes Min 2,4
Typ(1) Max 6.3 180
Units Test Conditions s s sec sec Word Program Mode Effective time per Byte (using Write Buffer)
2 2
0.8 0.7 26 35
tWHQV4 tWHRH
s
Notes: 1. Typical: Nominal voltages and TA = 25C. 2. Excludes system overhead. 3. Valid for all speed options. 4. To maximize system performance RDY/BSY# signal should be polled.
Waveforms for Reset Operation
Write Operation Read Operation
Valid Output
WE#
trec(RST) trec(WEL)
RST
tw(RST) P2
tWHQV tWHRH tWHRL
RDY/BSY
SYMBOL tw(RST) P2 trec(RST) trec(WEL) tWHRL
Parameter Reset pulse High time RST Low to reset during Erase/Program/Lock-bit Reset Low to output delay Reset Recovery to WE going Low WE High to Rdy/Bsy going low
Min 35
Max 100 500
Unit s ns ns s
1 100
ns
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series CIS DATA FOR FLF10 32MB & 64 MB CARDS BASED ON INTEL 28F128J3A
Address 00H 02H 04H 06H 08H 0AH 0CH 0EH 10H 12H Value 01H 03H 51H 7EH FEH FFH 1CH 04H 02H 51H 7EH FEH 14H 16H 18H 1AH 1CH 1EH 20H 22H 24H 26H 28H 2AH 2CH 2EH 30H 32H 34H 36H 38H 3AH 3CH 3EH 40H 42H 44H 46H FFH 18H 03H 89H 18H FFH 17H 03H 42H 01H FFH 1DH 03H 02H 11H FFH 1EH 07H 02H 12H 01H 01H 01H 01H FFH 20H Description CISTPL_DEVICE TPL_LINK FLASH = 250ns (device writable) CARD SIZE: 32MB 64MB END OF DEVICE CISTPL_DEVICE_OC TPL_LINK 3 VOLT OPERATION FLASH = 250ns (device writable) CARD SIZE:32MB 64MB END OF DEVICE CISTPL_JEDEC_C TPL_LINK Manufacturer ID -INTEL Device ID - 28F0128J3A END OF DEVICE CISTPL_DEVICE_A TPL_LINK EEPROM - 200ns Device Size = 2KBytes END OF TUPLE CISTPL_DEVICE_OA TPL_LINK 3 VOLT OPERATION ROM - 250ns END OF DEVICE CISTPL_DEVICEGEO TPL_LINK DGTPL_BUS DGTPL_EBS DGTPL_RBS DGTPL_WBS DGTPL_PART FLASH DEVICE NON-INTERLEAVED END OF TUPLE CISTPL_MANFID
c Address
48H 4AH 4CH 4EH 50H 52H 54H 56H 58H 5AH 5CH 5EH 60H 62H 64H 66H 68H 6AH 6CH 6EH 70H 72H 74H 76H 78H 7AH 7CH 7EH 80H 82H 84H 86H 88H 8AH 8CH 8EH 90H 92H 94H
Value 05H F6H 01H 00H 00H FFH 1AH 06H 01H 00H 00H 40H 00H FFH 1BH 03H 00H 00H FFH 15H 7FH 04H 01H 37H 50H 30H 33H 32H 46H 4CH 46H 31H 32H 2DH 2DH 2DH 32H 35H 20H EDI EDI LSB: MSB:
Description TPL_LINK(05H) TPLMID_MANF: LSB TPLMID_MANF: MSB Number Not Assigned Number Not Assigned END OF TUPLE CISTPL_CONF TPL_LINK TPCC_SZ TPCC_LAST TPCC_RADR TPCC_RADR TPCC_RMSK END OF TUPLE CISTPL_CFTABLE_ENTRY TPL_LINK TPCE_INDEX TPCE_FS (no selection) END OF TUPLE CISTPL_VERS1 TPL_LINK TPLLV1_MAJOR TPLLV1_MINOR 7 P 0 3 2 F L F 1 2 2 5 SPACE
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series CIS DATA FOR FLF10 32MB & 64 MB CARDS BASED ON INTEL 28F128J3A (CONT.)
Address 96H 98H 9AH 9CH 9EH A0H A2H A4H A6H A8H AAH ACH AEH B0H B2H B4H B6H B8H BAH BCH BEH C0H C2H C4H C6H C8H CAH CCH CEH D0H D2H D4H D6H D8H DAH DCH DEH E0H E2H E4H E6H E8H Value 00H 43H 4FH 50H 59H 52H 49H 47H 48H 54H 20H 57H 48H 49H 54H 45H 20H 45H 4CH 45H 43H 54H 52H 4FH 4EH 49H 43H 20H 44H 45H 53H 49H 47H 4EH 53H 20H 43H 4FH 52H 50H 4FH 52H Description END TEXT C O P Y R I G H T SPACE W H I T E SPACE E L E C T R O N I C SPACE D E S I G N S SPACE C O R P O R Address EAH ECH EEH F0H F2H F4H F6H F8H FAH FCH FEH 100H 102H 104H Value 41H 54H 49H 4FH 4EH 20H 00H 31H 39H 39H 39H 00H 00H FFH Description A T I O N SPACE END TEXT 1 9 9 9 END TEXT NULL END OF LIST
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series CIS DATA FOR FLF10 96MB - 192MB CARDS BASED ON INTEL 28F128J3A
Address 00H 02H 04H 06H 08H 0AH 0CH 0EH 10H 12H 14H 16H 18H 1AH 1CH 1EH 20H Value 01H 03H 51H FEH FFH 1CH 04H 02H 51H 7EH FFH 09H 06H 0CH 51H 07H 01H 02H 22H 24H 26H 28H 2AH 2CH 2EH 30H 32H 34H 36H 38H 3AH 3CH 3EH 40H 42H 44H 46H 7DH FEH FFH 18H 03H 89H 18H FFH 17H 03H 42H 01H FFH 1DH 03H 02H 11H FFH 1EH 07H Description CISTPL_DEVICE TPL_LINK FLASH = 250ns (device writable) CARD SIZE: 64MB (1 page) END OF DEVICE CISTPL_DEVICE_OC TPL_LINK 3 VOLT OPERATION FLASH = 250ns (device writable) CARD SIZE:64MB (1 page) END OF DEVICE CISTPL_EXTDEVICE TPL_LINK Mem Paging Info:2bit/COR/64MB Flash = 250 ns Device Size Extender 1x64MB (for 96MB and 128MB) 2x64MB (for 160MB and 192MB) +32MB (for 96MB and 160MB) +64MB (for 128MB and 192 MB) END OF TUPLE CISTPL_JEDEC_C TPL_LINK Manufacturer ID - INTEL Device ID - 28F0128J3A END OF DEVICE CISTPL_DEVICE_A TPL_LINK EEPROM - 200ns Device Size = 2Kbytes END OF TUPLE CISTPL_DEVICE_OA TPL_LINK 3 VOLT OPERATION ROM - 250ns END OF DEVICE CISTPL_DEVICEGEO TPL_LINK
st st
Address 48H 4AH 4CH 4EH 50H 52H 54H 56H 58H 5AH 5CH 5EH 60H 62H 64H 66H 68H 6AH 6CH 6EH 70H 72H 74H 76H 78H 7AH 7CH 7EH 80H 82H 84H 86H 88H 8AH 8CH 8EH 90H 92H
Value 02H 12H 01H 01H 01H 01H FFH 20H 05H F6H 01H 00H 00H FFH 1AH 06H 01H 00H 00H 40H 03H FFH 15H 7FH 04H 01H 37H 50H 30H 39H 36H 46H 4CH 46H 31H 32H 2DH 2DH EDI EDI LSB: MSB:
Description DGTPL_BUS DGTPL_EBS DGTPL_RBS DGTPL_WBS DGTPL_PART FLASH DEVICE NON-INTERLEAVED END OF TUPLE CISTPL_MANFID TPL_LINK(05H) TPLMID_MANF: LSB TPLMID_MANF: MSB Number Not Assigned Number Not Assigned END OF TUPLE CISTPL_CONF TPL_LINK TPCC_SZ TPCC_LAST TPCC_RADR TPCC_RADR TPCC_RMSK END OF TUPLE CISTPL_VERS1 TPL_LINK TPLLV1_MAJOR TPLLV1_MINOR 7 P 0 9 6 F L F 1 2 -
November 2000 Rev. 3 - ECO #13392
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series CIS DATA FOR FLF10 96MB - 192MB CARDS BASED ON INTEL 28F128J3A (CONT.)
Address 94H 96H 98H 9AH 9CH 9EH A0H A2H A4H A6H A8H AAH ACH AEH B0H B2H B4H B6H B8H BAH BCH BEH C0H C2H C4H C6H C8H CAH CCH CEH D0H D2H D4H D6H D8H DAH DCH DEH E0H E2H E4H E6H Value 2DH 32H 35H 20H 00H 43H 4FH 50H 59H 52H 49H 47H 48H 54H 20H 57H 48H 49H 54H 45H 20H 45H 4CH 45H 43H 54H 52H 4FH 4EH 49H 43H 20H 44H 45H 53H 49H 47H 4EH 53H 20H 43H 4FH Description 2 5 SPACE END TEXT C O P Y R I G H T SPACE W H I T E SPACE E L E C T R O N I C SPACE D E S I G N S SPACE C O
Address E8H EAH ECH EEH F0H F2H F4H F6H F8H FAH FCH FEH 100H 102H 104H 106H 108H 10AH Value 52H 50H 4FH 52H 41H 54H 49H 4FH 4EH 20H 00H 31H 39H 39H 39H 00H 00H FFH Description R P O R A T I O N SPACE END TEXT 1 9 9 9 END TEXT NULL END OF LIST
November 2000 Rev. 3 - ECO #13392
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PC Card Products
PCMCIA Flash Memory Card
FLF10 Series
PRODUCT MARKING WED 7P032FLF1200C15 C995 9915
EDI
Date code Lot code / trace number Part number Company Name
Note: Some products are currently marked with our pre-merger company name/acronym (EDI). During our transition period, some products will also be marked with our new company name/acronym (WED). Starting October 2000 all PCMCIA products will be marked only with the WED prefix.
PART NUMBERING 7 P 032 FLF12 00 C 15
Card access time
15 25 150ns 250ns
Temperature range
C Commercial 0C to +70C I Industrial -40C to +85C
Packaging option
00 Standard, type 1
Card family and version
- See Card Family and Version Info. for details (next page)
Card capacity
032 32MB
PC card
P R 7 8
November 2000 Rev. 3 - ECO #13392 16
Standard PCMCIA Ruggedized PCMCIA FLASH SRAM
PC Card Products
Card technology
PCMCIA Flash Memory Card
FLF10 Series Ordering Information
7P XXX FLF YY SS T ZZ
where XXX: 032 064 096 128 160 192 12 14 32MB 64MB 96MB 128MB 160MB 192MB based on 28F128J3A With Attribute Memory based on 28F128J3A With Attribute Memory and Write Protect Switch (optional) WEDC Logo Blank Housing Type 1 Blank Housing T 1 (Recessed) Commercial 200ns 250ns
YY:
SS:
00 01 02 C 20 25
T: ZZ:
Date of Revision 22-Jul-99 31-May-00 01-Aug-00 06-Nov-00
REVISION HISTORY Version Description -000 Initial Release -001 Add Pg. 16 -002 Corrected Timing Errors, Pgs. 9 & 10 -003 Corrected CIS Errors, Pg. 14, and Added Memory Chip Information, Pg. 6
White Electronic Designs Corporation
One Research Drive, Westborough, MA 01581, USA tel: fax: (508) 366 5151 (508) 836 4850
www.whiteedc.com
November 2000 Rev. 3 - ECO #13392
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PC Card Products

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